diff --git a/zircon/kernel/target/arm64/board/as370/boot-shim-config.h b/zircon/kernel/target/arm64/board/as370/boot-shim-config.h new file mode 100644 index 0000000000000000000000000000000000000000..a0418de7df64382af1147b4965f25dc491fd4b91 --- /dev/null +++ b/zircon/kernel/target/arm64/board/as370/boot-shim-config.h @@ -0,0 +1,79 @@ +// Copyright 2019 The Fuchsia Authors. All rights reserved. +// Use of this source code is governed by a BSD-style license that can be +// found in the LICENSE file. + +#define HAS_DEVICE_TREE 1 + +static const zbi_cpu_config_t cpu_config = { + .cluster_count = 1, + .clusters = { + { + .cpu_count = 1, + }, + }, +}; + +static const zbi_mem_range_t mem_config[] = { + { + .type = ZBI_MEM_RANGE_RAM, + .paddr = 0, + .length = 0x20000000, // 512M + }, + { + .type = ZBI_MEM_RANGE_PERIPHERAL, + .paddr = 0xf0000000, + .length = 0x10000000, + }, +}; + +static const dcfg_simple_t uart_driver = { + .mmio_phys = 0xf7e80c00, + .irq = 56, +}; + +static const dcfg_arm_gicv2_driver_t gicv2_driver = { + .mmio_phys = 0xf7900000, + .gicd_offset = 0x1000, + .gicc_offset = 0x2000, + .ipi_base = 9, +}; + +static const dcfg_arm_psci_driver_t psci_driver = { + .use_hvc = false, +}; + +static const dcfg_arm_generic_timer_driver_t timer_driver = { + .irq_phys = 30, + .irq_virt = 27, + //.freq_override = 8333333, +}; + +static const zbi_platform_id_t platform_id = { + .vid = PDEV_VID_SYNAPTICS, + .pid = PDEV_PID_SYNAPTICS_AS370, + .board_name = "as370", +}; + +static void append_board_boot_item(zbi_header_t* bootdata) { + // add CPU configuration + append_boot_item(bootdata, ZBI_TYPE_CPU_CONFIG, 0, &cpu_config, + sizeof(zbi_cpu_config_t) + + sizeof(zbi_cpu_cluster_t) * cpu_config.cluster_count); + + // add memory configuration + append_boot_item(bootdata, ZBI_TYPE_MEM_CONFIG, 0, &mem_config, + sizeof(zbi_mem_range_t) * countof(mem_config)); + + // add kernel drivers + append_boot_item(bootdata, ZBI_TYPE_KERNEL_DRIVER, KDRV_DW8250_UART, &uart_driver, + sizeof(uart_driver)); + append_boot_item(bootdata, ZBI_TYPE_KERNEL_DRIVER, KDRV_ARM_GIC_V2, &gicv2_driver, + sizeof(gicv2_driver)); + append_boot_item(bootdata, ZBI_TYPE_KERNEL_DRIVER, KDRV_ARM_PSCI, &psci_driver, + sizeof(psci_driver)); + append_boot_item(bootdata, ZBI_TYPE_KERNEL_DRIVER, KDRV_ARM_GENERIC_TIMER, &timer_driver, + sizeof(timer_driver)); + + // add platform ID + append_boot_item(bootdata, ZBI_TYPE_PLATFORM_ID, 0, &platform_id, sizeof(platform_id)); +} diff --git a/zircon/kernel/target/arm64/boot-shim/BUILD.gn b/zircon/kernel/target/arm64/boot-shim/BUILD.gn index 94d069bdb366926291b79b381b67e1a668001e0f..6bb947f043c184f264ad7e54788220682dcb5474 100644 --- a/zircon/kernel/target/arm64/boot-shim/BUILD.gn +++ b/zircon/kernel/target/arm64/boot-shim/BUILD.gn @@ -147,6 +147,9 @@ template("boot_shim") { } } +boot_shim("as370") { +} + boot_shim("hikey960") { } diff --git a/zircon/kernel/target/arm64/boot-shim/as370-uart.c b/zircon/kernel/target/arm64/boot-shim/as370-uart.c new file mode 100644 index 0000000000000000000000000000000000000000..cb77178e151a1d571824846260e11755974cbb64 --- /dev/null +++ b/zircon/kernel/target/arm64/boot-shim/as370-uart.c @@ -0,0 +1,18 @@ +// Copyright 2019 The Fuchsia Authors. All rights reserved. +// Use of this source code is governed by a BSD-style license that can be +// found in the LICENSE file. + +#include <stdint.h> +#include "debug.h" + +#define UART_THR (0x0) // TX Buffer Register (write-only) +#define UART_LSR (0x14) // Line Status Register +#define UART_LSR_THRE (1 << 5) + +#define UARTREG(reg) (*(volatile uint32_t*)(0xf7e80c00 + (reg))) + +void uart_pputc(char c) { + while (!(UARTREG(UART_LSR) & UART_LSR_THRE)) + ; + UARTREG(UART_THR) = c; +} diff --git a/zircon/system/ulib/ddk/include/ddk/platform-defs.h b/zircon/system/ulib/ddk/include/ddk/platform-defs.h index a11a64a52d7f3d7f86690fcf64e09938a02fadd8..928636ef605f036794270d02999b01e0a3890ba0 100644 --- a/zircon/system/ulib/ddk/include/ddk/platform-defs.h +++ b/zircon/system/ulib/ddk/include/ddk/platform-defs.h @@ -210,6 +210,10 @@ __BEGIN_CDECLS #define PDEV_DID_QUALCOMM_CLOCK 4 #define PDEV_DID_QUALCOMM_POWER 5 +// Synaptics +#define PDEV_VID_SYNAPTICS 20 +#define PDEV_PID_SYNAPTICS_AS370 1 + __END_CDECLS #endif // DDK_PLATFORM_DEFS_H_